1. Field of the Invention
The present invention relates to a pattern layout for forming an integrated circuit, a photo-mask having a mask pattern formed in accordance with the layout, a method of manufacturing a semiconductor device by use of the photo-mask, and a data creation method for creating, from design data, pattern data to be implemented on a photo-mask.
2. Description of the Related Art
In semiconductor integrated circuits, memory cell sections employ repetitive patterns of lines and spaces drawn in accordance with a design rule of a size close to the resolution limit. Where a photo-mask having such patterns is used, it is difficult to attain sufficient resolution by an ordinary lighting condition. Accordingly, in order to obtain effective resolution of narrow pitch patterns, it is necessary to use a lighting source to radiate light through outer and inner portions on a plane associated with the mask pattern surface essentially by Fourier transformation. However, according to this method, the repetitive portion at the center of a memory cell array is provided with a high resolution level, while the boundary at the pattern end portion of the cell array is provided only with a low resolution level.
In order to solve this problem and thereby to improve the light exposure margin at the pattern end portion of the cell array, it is common to used a design in which the pattern pitch is gradually increased in a region where the periodicity is not held. FIG. 1 is a view showing a conventional pattern layout. FIG. 2 is a view showing normalized light intensity for the layout shown in FIG. 1. The image intensity distribution shown in FIG. 2 was obtained by employing a lighting system that was arranged on the basis of dipole illumination with an exposure light wavelength of 193 nm and a maximum coherent factor σ=0.97 and modified to set part of the outermost portion and inner portion of σ to be luminous.
It is assumed that the lighting source and the method of gradually increasing the pitch described above are applied to the mask pattern shown in FIG. 1 (numerals denote dimensions a wafer). In this case, as shown in FIG. 2, the image intensity distribution thus obtained renders a decrease in optical contrast, which results in a decrease in lithography margin, at the line-and-space end portion (a range A in FIG. 2). Further, as compared to a range C in FIG. 2, ranges A and B have larger fluctuations in image intensity distribution, and thus increase the CAD (computer aided design) processing time to perform optical proximity effect correction.
FIG. 3 is a view showing another conventional pattern layout. FIG. 4 is a view showing normalized light intensity for the layout shown in FIG. 3. The same conditions as those used in FIG. 2 were applied to FIG. 4. There is a conventional technique in which a mask layout of the type shown in FIG. 1 is provided with an auxiliary pattern that cannot be resolved (i.e., that is unresolvable), as shown in FIG. 3 (for example, see Jpn. Pat. Appln. KOKAI Publication No. 3-210560 (Patent Document 1)). However, in this case, as shown in FIG. 4, the image intensity distribution thus obtained is not so improved as compared with FIG. 2. Accordingly, this technique cannot avoid a decrease in contrast and a decrease in lithography margin, as in the former case.
As described above, where exposure optical conditions are selected to satisfy the resolution of conventional cell array patterns, the resolution of patterns becomes lower at the end portion of the line-and-space pattern. This brings about a decrease in lithography margin and an increase in CAD processing time to perform optical proximity effect correction.
Accordingly, it is preferable to provide a pattern layout for forming an integrated circuit, which can improve the solution not only of simple repetitive line-and-space patterns but also of the line-and-space pattern end portion. Further, it is preferable to provide a photo-mask having a mask pattern formed in accordance with the layout, a method of manufacturing a semiconductor device by use of the photo-mask, and a data creation method for creating, from design data, pattern data to be implemented on a photo-mask.